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Working With Pin/Padstack Level Via Fan-Outs

Warning: The process will alter the native CAD data. Therfore subsequent translations will reflect the changes made. This process was intended for a translation to the Agilent 5DX AXI tester machine to overcome the via fan-outs in BGA land patterns.

Inspect CAD data for Via Fan-Outs

There Are Potentially Three Basic Via Fan-Out Scenarios:

  1. Board Level Via Fan-Outs - Fan-Outs for pins of component instances are added at the Board Level. This means that the Via and Etch/Trace elements exist on the Board Level and are NOT part of the component definition or pin definition. This is always preferred and should never cause translation issues.
  2. Geometry Level Via Fan-Outs - Fan-Outs for component pins are added at the geometry level. This means that the Via could be placed as a Via in the geometry or as a Pin in the geometry. In the case that the Via is placed as a Via this should not cause translation issues. If the Via is placed into the geometry as a Pin, issues will arise such as the component being identified as Through-Hole and the pin count and description will be incorrect/inaccurate.
  3. Pin/Padstack Level Via Fan-Outs - Fan-Outs are defined at the pin/padstack level. This means that the pin/padstack of the component contains the primitive elements for the SMD land, the Via instance, and for the fan-out trace. By it's definition all elements are now the pin. Therefore the pin will be Through Hole, maybe offfset from true pin location and the true pin shape will not be determinable.

In this document we will cover the process and steps required to correct Via Fan-Outs at the Pin/Padstack level. First one must identify geometries that exhibit this particular characteristic. Many methods may be employed to identify components with this issue. All of those methods will not be covered within this document. Visual inspection or output analysis are two potential methods. Once a component has been identified to contain pin/padstack level via fan-outs the procedure to correct said component is as follows:

  1. Edit The Geometry - This can be achieved by selecting an instance of the geometry at the board level and then selecting Edit | Geometry | Edit Selected Geometry from the CAMCAD menu. It can also be achieved by selecting Edit | Geometry | Pick and Edit a Geometry from the CAMCAD menu and in the resulting dialog, select the desired geometry by name from the list and click the Edit Geometry button. (For Both Edit Geometry Options See Picture Below)

  2. Edit The Pin/Padstack - This can be achieved by highlighting one of the pins of the geometry and selecting Edit | Geometry | Edit Selected Geometry from the CAMCAD menu or by expanding the geometry definition in the Pick Geometry To Edit dialog and double clicking the padstack name. This will bring up the padstack in Geometry Edit mode. (See Picture Below)

  3. Delete Non-Pin Elements - I.E. - Pad and tool primitives for the "VIA" and polyline and trace/etch segments should now be selected and deleted from the padstack definition. Use any method to select and delete these primitive elements. I.E. - Mark By Window (Query | Mark By Window) and Delete Selected (Edit | Delete Selected, Hotkey = Ctrl + D). Repeat Delete Selected until only remaining elements are that which make up the SMD land. (See Picture Below)

    Attn: If, when selecting via and trace/etch elements, elements of the SMD land/padstack are also selected then you have encountered a complex aperture (See Step A below for details and example). Additional steps are required to resolve this complex aperture. Follow steps A, B & C below Step 3 screen capture to resolve complex apertures.

    Step A Discovering Complex Apertures - When deleting non-pin elements, if elements from the via and the SMD land are highlighted simultanoeusly, then you have a complex aperture. (See Picture Below)

    Step B. Edit the complex shape - This can be achieved by highlighting one of the complex apertures of the padstack and selecting Edit | Geometry | Edit Selected Geometry from the CAMCAD menu or by expanding the padstack definition in the Pick Geometry To Edit dialog and double clicking the complex aperture name. This will bring up the complex aperture in Geometry Edit mode. (See Picture Below)

    Step C. Delete Non-Pin Elements - I.E. - Pad and tool primitives for the "VIA" and polyline and trace/etch segments should now be selected and deleted from the complex aperture definition. Use any method to select and delete these primitive elements. I.E. - Mark By Window (Query | Mark By Window) and Delete Selected (Edit | Delete Selected, Hotkey = Ctrl + D). Repeat Delete Selected until only remaining elements are that which make up the SMD land. (See Picture Below)

    After deleting the undesired elements from the complex aperture, return to the padstack and proceed back to step 3 and remove non SMD land data at the padstack level (To get back to Editing the padstack, click and highlight the padstack name in the "Pick Geometry to Edit" Dialog and click the Edit Button.

  4. Change Origin of Padstack - Once the non-SMD pin elements have been removed from the padstack, the origin can be adjusted to the center of the pin graphics. Use Settings | Change Origin Position while in Edit Geometry Mode to activate the Origin Change. Freely place the origin at the center of the pin graphics or use CAMCAD Snap functions to snap to the center of the pad. (See Picture Below for Active Origin Change Command Using Snap to Center)

  5. Restructure Files Around Origin - This command will resolve all inserts of the padstack in the geometry ensure that the insert X & Y locations for each pin is correct. Use this command after changing the origin of each unique padstack. (See Picture Below For CAMCAD Menu Path To This Command)


    Repeat Steps 1-6 for each geometry in the design that displays the Via Fan-Out issue at the pin/padstack level. After re-structuring click DONE in the Pick Geometry to Edit dialog. This will bring you back to the Board View. The component instances that reference the geometry which you have made changes to should now only contain the SMD lands at the correct X & Y location relative to the geometry and board. (See Picture Below for View of Component Instance of Edited Geometry)